US Government Urges TSMC, Intel to Launch Joint Venture: Inside the Mega Deal!

Speculation from a Wall Street analyst hints that the U.S. government is encouraging Intel and TSMC to establish a joint venture for chip production. This new entity would be co-owned by both companies and managed by TSMC.

A Wall Street Journal article indicates that the U.S. government desires TSMC to leverage its extensive experience in high-volume manufacturing with EUV lithography to enhance Intel’s process technologies. Moreover, a rumor shared by the Financial Times suggests a rapid expansion of TSMC’s Fab 21 complex in Arizona.

Unusual Speculation

“Sources from the Asian supply chain indicate potential U.S. government involvement in the following scenario: TSMC would dispatch engineers to Intel’s 3nm/2nm fab to apply its expertise, ensuring the fab’s viability and future manufacturing projects at Intel,” notes Tristan Gerra, an analyst with Baird, in a client memo (via @WallStEngine). “This fab might be transformed into a new company jointly owned and operated by TSMC, with funding from the U.S. Chip Act.”

While Tristan Gerra acknowledges that these rumors are unconfirmed and the project may take a significant amount of time to come to fruition, analysts see the strategy as logical. If realized, it would lighten Intel’s financial burdens, allowing the company to concentrate more on chip architecture and platform solutions. Moreover, Intel would maintain its production capabilities, aligning with strategies previously outlined by ex-CEO Pat Gelsinger. Additionally, a functioning and competitive manufacturing facility could attract major chip designers, offering a reliable and secure manufacturing option and ensuring the fab’s full utilization.

The speculation is peculiar, posing both technological and business challenges. Technologically, semiconductor manufacturers could “share know-how” by aiding each other in tuning equipment for specific process technologies, or by transferring an established production node to a new facility.

Technological Challenges

TSMC engineers are not familiar with Intel’s EUV-based fabrication processes and specific recipes, which limits their ability to make immediate effective changes, potentially taking months. Intel’s 3nm node is already in mass production, and the 18A technology is set to enter high-volume manufacturing soon. According to Intel, the 18A process doesn’t require further tuning, especially not by external engineers.

Transferring TSMC’s fabrication technologies to an Intel fab in the U.S. presents significant hurdles. Even though both may use EUV lithography, each operates with distinct tool setups, fab configurations, and vendor-specific adaptations. For instance, ASML’s lithography machines usually have custom calibrations or additional modules tailored to each chipmaker’s process needs. Moreover, Intel and TSMC utilize different etch recipes, deposition sequences, and step-by-step controls, which often impact tools’ performance.

The fabrication processes also rely on meticulously sourced materials with strict purity and composition standards. Even minor variations in photoresist or etch chemistries can introduce defects or cause process drift. Additionally, the chemical suppliers and formulations approved by TSMC differ from those of Intel, and there’s no guarantee that TSMC’s materials would perform optimally on Intel’s equipment.

Even slight discrepancies in temperature control, gas flows, or photomask handling can lead to significant deviations in line widths, transistor characteristics, and yields, making technology transfer complex, costly, and potentially unprofitable.

Business Implications

From a business perspective, TSMC has little incentive to aid Intel in enhancing its EUV fabrication capabilities, as Intel remains a competitor. Additionally, forming a joint venture with Intel could negatively impact TSMC’s gross margins. The only potential motive for TSMC might be to sidestep tariffs possibly reintroduced by the Trump administration, necessitating local production of advanced chips using N3 and N2 technologies.

However, it’s doubtful that Intel’s existing U.S. facilities have sufficient EUV production capacity to meet both its own needs and those of TSMC’s clients. Thus, fast-tracking the implementation of N3 and N2 technologies at TSMC’s Arizona fabs makes more business sense, as noted by analysts cited in the Financial Times.

For Intel, collaborating with TSMC on this level seems impractical. It is unlikely that TSMC engineers would significantly boost Intel’s 3nm and 18A technologies. Moreover, transferring TSMC nodes to U.S. fabs suggests that Intel’s facilities in Ireland and Israel would be relegated to using older nodes.

Ultimately, these sites may not prove financially sustainable in the long term, as process technologies are costly to develop, and economies of scale are critical. Clearly, TSMC has little interest in transferring its advanced nodes to Intel’s facilities in Ireland and Israel, even within a joint venture, as it could lead to overcapacity issues for its technologies.

Final Thoughts

The ongoing geopolitical landscape mixed with Intel’s financial and operational struggles has fueled various speculations about the company’s future moves. In this scenario, both significant technological and business obstacles—from differences in tooling and process recipes at Intel and TSMC to TSMC’s reluctance to assist a competitor—raise questions about the viability of such a partnership.