Breaking: Synopsys Unveils Ultra Ethernet, UALink IP for Next-Gen AI Datacenters!

On Wednesday, Synopsys unveiled its advanced Ultra Ethernet IP solution, designed for cutting-edge AI clusters capable of handling up to one million nodes. Additionally, they introduced a UALink IP solution aimed at connecting extensive pods that can support up to 1,024 accelerators. These innovations pave the way for the development of state-of-the-art Ultra Ethernet network controllers, network interface cards, switches, UALink fabrics, and various other connectivity solutions.

The Ultra Ethernet IP lineup from Synopsys features a MAC and PCS controller, the tested Synopsys 224G PHY, and verification IP that meets the UEC specifications and complies with the latest IEEE 802.3 and OIF-224G standards. This IP can handle multiple data rates, including 4 x 400G, 2 x 800G, and 1.6T Ethernet, and utilizes high-speed 112 Gbps and 224 Gbps SerDes technologies. Furthermore, the IP supports essential Ultra Ethernet functionalities such as sophisticated error correction, low latency, support for up to one million nodes, and intelligent multipathing, which optimizes data packet distribution through the best possible routes.

Many of Synopsys’s UE IPs are already in use, helping chip and device manufacturers save time, minimize risk, and accelerate their market launch timelines. Overall, Synopsys provides complete silicon implementations for network cards, switches, AI accelerators, smart NICs, among others.

Debashis Basu, the senior vice president of Juniper Engineering, remarked, “Juniper has already deployed the industry’s first 800GbE functionality through our PTX10002-36QDD Packet Transport Router, which incorporates our own Express 5 ASIC along with Synopsys Ethernet IP. We plan to keep collaborating with Synopsys and utilize the latest offerings from the Ultra Ethernet Consortium (UEC) to move towards the 1.6TbE phase. This reflects our continuous innovation in high-speed networking aimed at enhancing scale, reliability, and performance in data center networks—a crucial factor as AI workloads surge, demanding more efficient and cost-effective networks.”

Alongside the Ultra Ethernet IP stack, Synopsys also offers a UALink IP solution that includes PHY, controller, and verification IP, enabling high-speed scale-up connections similar to Nvidia’s NVLink for AI accelerators. This allows for linking up to 1,024 accelerators per pod at 200 Gbps. UALink IP also includes features that minimize delays and boost overall AI system performance. A notable feature of UALink is its support for shared memory access across processors using RDMA, which helps eliminate common performance bottlenecks in AI clusters.

Synopsys has planned a phased rollout for these new connectivity technologies. The Ultra Ethernet IP stack is set to be available in the first half of 2025, followed by the UALink IP solution, which will include its controller, PHY, and verification IP, scheduled for release in the second half of the year.